I saw this debounce circuit here and they said that when the switche bounces from NC - NO - NC, the output 0 of the NAND gate g1 locks the output of g2 to 1 and the output still stays the same.
However, if we assume ideal NAND gates, shouldn't the output of g1 instantaneously change to 1 upon the switch closing to NO (giving an input of 0 to g1) ? This means that the output of g2 is no more locked to 1 and will be affected by the switch bouncing.